Data Processing on FPGAs
Publication Details
Title
Data Processing on FPGAs
Authors
René Müller, Jens Teubner, and Gustavo Alonso
Published
Proceedings of the VLDB Endowment (PVLDB), vol. 2(1), Lyon, France, August 2009
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Abstract
Computer architectures are quickly changing toward heterogeneous many-core systems. Such a trend opens up interesting opportunities but also raises immense challenges since the efficient use of heterogeneous many-core systems is not a trivial problem. In this paper, we explore how to program data processing operators on top of field-programmable gate arrays (FPGAs). FPGAs are very versatile in terms of how they can be used and can also be added as additional processing units in standard CPU sockets.
In the paper, we study how data processing can be accelerated using an FPGA. Our results indicate that efficient usage of FPGAs involves non-trivial aspects such as having the right computation model (an asynchronous sorting network in this case); a careful implementation that balances all the design constraints in an FPGA; and the proper integration strategy to link the FPGA to the rest of the system. Once these issues are properly addressed, our experiments show that FPGAs exhibit performance figures competitive with those of modern general-purpose CPUs while offering significant advantages in terms of power consumption and parallel stream evaluation.
Publication Log
June 2009
camera-ready for VLDB 2009
March 2009
submission to VLDB 2009 (accepted)
- submission (PDF)
- reviews (results: accept, accept, accept)
- author feedback
December 2008
submission to SIGMOD 2009 (rejected)
- submission (PDF)
- reviews (results: weak reject, accept, weak reject)
- author feedback