Reviews for paper Real-Time Pattern Matching with FPGAs, submitted to ICDE 2011.
Overall rating: accept
Strong Accept
Excellent
Medium
The proposal is based on a recent PVLDB paper by the same authors, and demonstrates how to compile CEP quries into FPGA specifications. It very clearly describes setup, goals and demonstration "script". The topic is fun.
I cannot find serious defects with the demo proposal, other than that I miss some hints on what the performance or price/performance comparison to a regular machine looks like.
Weak Accept
Good
Medium
This demo presents a fast stream monitor for complex event patterns implemented using FPGA. The demo illustrates the working of a pattern specification to hardware compilation.
+ Addresses a practical problem
+ Nice for demo to provide hooks for participants to examine how the system works
+ The combination of software/hardware makes this an interesting demo that is quite different from the software demo
Accept
Good
Medium
This paper proposes to demonstrate real-time complex event pattern matching using FPGA (Field-Programmable Gate Arrays) hardware. It would make an interesting demo as the audience sees how to program, compile, and run complex event queries on FPGA. As the highlight of the system is its performance, it would be great to set up a scenario that the FPGA runs at its near-peak capacity on site instead of only showing the performance figures from the author's previous paper. Additionally, since the paper's target applications are in high-throughput areas such as financial trading or network monitoring, it would be more interesting to set up such an application scenario rather than using a generic multi-step web form.
None