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Real-Time Pattern Matching with FPGAs

Publication Details


Real-Time Pattern Matching with FPGAs


Louis Woods, Jens Teubner, and Gustavo Alonso


Proceedings of the 27th Int'l Conference on Data Engineering (ICDE), Demonstration Track, Hannover, Germany, April 2011.


paper (PDF)


We demonstrate a hardware implementation of a complex event processor, built on top of field-programmable gate arrays (FPGAs). Compared to CPU-based commodity systems, our solution shows distinctive advantages for stream monitoring tasks, e.g., wire-speed processing and predictable performance.

The demonstration is based on a query-to-hardware compiler for complex event patterns that we presented at VLDB 2010. By example of a click stream monitoring application, we illustrate the inner workings of our compiler and indicate how FPGAs can act as efficient and reliable processors for event streams.

Publication Log

July 2010

submission to ICDE 2011 (accepted)

March 2010

submission to VLDB 2010 (rejected)

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Prof. Dr. Jens Teubner
Tel.: 0231 755-6481